0009862-A1 is referenced by 8 patents and cites 4 patents.

A mode selection circuit is disclosed which is suitable for configuring a data processor at the time at which the data processor is initialized with a reset signal. Mode selection latches (90, 92, 96) are coupled to terminals (6) normally used as an input/output port for the data processor and the latches are clocked with a signal (88) generated by a lever detector circuit (108) which senses the reset signal (98). The mode selection latches are programmed by applying appropriate logic levels to the terminals of the input/output port at the time at which the data processor is being reset. The circuitry is adapted for allowing the connection of a diode (100) from a terminal (6) of the input/output port to the reset terminal (98) of the data processor in order to program a low logic level into the corresponding mode detection latch.

Programmable mode of operation select by reset and data processor using this select.
Application Number
EP19790301475 19790725
Publication Number
0009862 (A1)
Application Date
July 25, 1979
Publication Date
April 16, 1980
Tietjen Donald Louis
Wiles Michael Frederick
Shaw Pern
G06F 03/00
G06F 01/00
G06F 15/76
G06F 09/30
G06F 01/24
G06F 07/00
G06F 15/78
G06F 09/30
G06F 01/24
G06F 07/00
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